In the fabrication of semiconductor components, die size of the component plays a large role in the fabrication costs of the component. Larger die sizes leads to higher fabrication costs because the number of components produced from a given wafer size decreases with increasing die size. Larger die sizes also result in higher fabrication costs because the yield as measured by percentage of acceptable components decreases with increasing die size due to the higher incidence of defects associated with the larger die sizes.
Two factors contribute to the selection of a die size for a semiconductor component. The first factor is the number of pins required for the component. The number of pins required bears a direct correlation with the number of signals transmitted to and from the component. The second factor is the number of gates required in fabricating the component which bears a direct relationship with the number of functions performed by the component. Sometimes the die size as dictated by the required number of pins matches the die size as dictated by the required number of gates. In this circumstance, the particular die size is fully utilized. However, in other situations, the die size as dictated by the required number of gates exceeds the die size as dictated by the required number of pins. When this situation occurs, it would be extremely beneficial to have the ability to "transfer" functions from one component to another to better match the number of gates to number of pins. When this transfer occurs, the required number of gates decreases for the transferer component and a lower die size can be utilized.
Moreover, with many computer systems, the system transmits an address through a first component to a second component. When the first component receives the address, it decodes the address. It then retransmits the address to the second component. The second component then decodes the address a second time. The decoding of the address twice results in duplication of efforts by the two components. Thus, it would be extremely beneficial to have the ability to reduce the amount of duplicative decoding. When this reduction of duplicative decoding occurs, the system can achieve higher performance.
One prior computer system utilized a chip select line between a first component and a second component to indicate that the second component was a destination for data. In this system, some decoding functions were transferred from one component to another and some duplicative decoding was eliminated. However, with this system, the address received by the first component and the address transmitted by the first component to the second component had the same length. In addition, the chip select information provided by the first component only indicated the component destination for data and did not specify the destination within the component. Moreover, the chip select line necessitated the addition of pins potentially resulting in an undesireable increase in die size. Consequently, the second component still had to perform a significant amount of decoding. Although, the system allowed for some transfer of decoding functions and some elimination of duplicative decoding, more of both was needed.
Thus, what is needed is a method and apparatus which allows the transfer of functions between components thereby allowing for the transfer of gates between components. What is also needed is a method and apparatus which allows for elimination of duplicative decoding to enhance computer system performance.